The present application relates to semiconductor device fabrication, and more particularly, to the metallization of vertical field effect transistors (FETs).
A vertical field effect transistor (FET) has a channel oriented perpendicular to the substrate surface, as opposed to being situated along the plane of the surface of the substrate in the case of a lateral FET. By using a vertical design, it is possible to increase packing density. That is, by having the channel perpendicular to the substrate, vertical FETs improve the scaling limit beyond lateral FETs. However, vertical device architecture makes metallization of vertical FETs very difficult.